//-----------------------------------------------------------------------------
// cpu_top.v
//-----------------------------------------------------------------------------

module cpu_top
  (
    RS232_Uart_1_sout,
    RS232_Uart_1_sin,
    RESET,
    MCB_DDR3_rzq,
    MCB_DDR3_dram_we_n,
    MCB_DDR3_dram_udqs_n,
    MCB_DDR3_dram_udqs,
    MCB_DDR3_dram_udm,
    MCB_DDR3_dram_ras_n,
    MCB_DDR3_dram_odt,
    MCB_DDR3_dram_ldm,
    MCB_DDR3_dram_dqs_n,
    MCB_DDR3_dram_dqs,
    MCB_DDR3_dram_dq,
    MCB_DDR3_dram_ddr3_rst,
    MCB_DDR3_dram_clk_n,
    MCB_DDR3_dram_clk,
    MCB_DDR3_dram_cke,
    MCB_DDR3_dram_cas_n,
    MCB_DDR3_dram_ba,
    MCB_DDR3_dram_addr,
    CLK,
    VGA_AXI_ARADDR,
    VGA_AXI_ARLEN,
    VGA_AXI_ARSIZE,
    VGA_AXI_ARBURST,
    VGA_AXI_ARCACHE,
    VGA_AXI_ARPROT,
    VGA_AXI_ARVALID,
    VGA_AXI_ARREADY,
    VGA_AXI_RDATA,
    VGA_AXI_RRESP,
    VGA_AXI_RLAST,
    VGA_AXI_RVALID,
    VGA_AXI_RREADY,
    REGS_AXI_AWADDR,
    REGS_AXI_AWVALID,
    REGS_AXI_AWREADY,
    REGS_AXI_WDATA,
    REGS_AXI_WSTRB,
    REGS_AXI_WVALID,
    REGS_AXI_WREADY,
    REGS_AXI_BRESP,
    REGS_AXI_BVALID,
    REGS_AXI_BREADY,
    REGS_AXI_ARADDR,
    REGS_AXI_ARVALID,
    REGS_AXI_ARREADY,
    REGS_AXI_RDATA,
    REGS_AXI_RRESP,
    REGS_AXI_RVALID,
    REGS_AXI_RREADY,
    CAMERA_AXI_AWADDR,
    CAMERA_AXI_AWLEN,
    CAMERA_AXI_AWSIZE,
    CAMERA_AXI_AWBURST,
    CAMERA_AXI_AWCACHE,
    CAMERA_AXI_AWPROT,
    CAMERA_AXI_AWVALID,
    CAMERA_AXI_AWREADY,
    CAMERA_AXI_WDATA,
    CAMERA_AXI_WSTRB,
    CAMERA_AXI_WLAST,
    CAMERA_AXI_WVALID,
    CAMERA_AXI_WREADY,
    CAMERA_AXI_BRESP,
    CAMERA_AXI_BVALID,
    CAMERA_AXI_BREADY
  );
  output RS232_Uart_1_sout;
  input RS232_Uart_1_sin;
  input RESET;
  inout MCB_DDR3_rzq;
  output MCB_DDR3_dram_we_n;
  inout MCB_DDR3_dram_udqs_n;
  inout MCB_DDR3_dram_udqs;
  output MCB_DDR3_dram_udm;
  output MCB_DDR3_dram_ras_n;
  output MCB_DDR3_dram_odt;
  output MCB_DDR3_dram_ldm;
  inout MCB_DDR3_dram_dqs_n;
  inout MCB_DDR3_dram_dqs;
  inout [15:0] MCB_DDR3_dram_dq;
  output MCB_DDR3_dram_ddr3_rst;
  output MCB_DDR3_dram_clk_n;
  output MCB_DDR3_dram_clk;
  output MCB_DDR3_dram_cke;
  output MCB_DDR3_dram_cas_n;
  output [2:0] MCB_DDR3_dram_ba;
  output [12:0] MCB_DDR3_dram_addr;
  input CLK;
  input [31:0] VGA_AXI_ARADDR;
  input [7:0] VGA_AXI_ARLEN;
  input [2:0] VGA_AXI_ARSIZE;
  input [1:0] VGA_AXI_ARBURST;
  input [3:0] VGA_AXI_ARCACHE;
  input [2:0] VGA_AXI_ARPROT;
  input VGA_AXI_ARVALID;
  output VGA_AXI_ARREADY;
  output [31:0] VGA_AXI_RDATA;
  output [1:0] VGA_AXI_RRESP;
  output VGA_AXI_RLAST;
  output VGA_AXI_RVALID;
  input VGA_AXI_RREADY;
  output [31:0] REGS_AXI_AWADDR;
  output REGS_AXI_AWVALID;
  input REGS_AXI_AWREADY;
  output [31:0] REGS_AXI_WDATA;
  output [3:0] REGS_AXI_WSTRB;
  output REGS_AXI_WVALID;
  input REGS_AXI_WREADY;
  input [1:0] REGS_AXI_BRESP;
  input REGS_AXI_BVALID;
  output REGS_AXI_BREADY;
  output [31:0] REGS_AXI_ARADDR;
  output REGS_AXI_ARVALID;
  input REGS_AXI_ARREADY;
  input [31:0] REGS_AXI_RDATA;
  input [1:0] REGS_AXI_RRESP;
  input REGS_AXI_RVALID;
  output REGS_AXI_RREADY;
  input [31:0] CAMERA_AXI_AWADDR;
  input [7:0] CAMERA_AXI_AWLEN;
  input [2:0] CAMERA_AXI_AWSIZE;
  input [1:0] CAMERA_AXI_AWBURST;
  input [3:0] CAMERA_AXI_AWCACHE;
  input [2:0] CAMERA_AXI_AWPROT;
  input CAMERA_AXI_AWVALID;
  output CAMERA_AXI_AWREADY;
  input [31:0] CAMERA_AXI_WDATA;
  input [3:0] CAMERA_AXI_WSTRB;
  input CAMERA_AXI_WLAST;
  input CAMERA_AXI_WVALID;
  output CAMERA_AXI_WREADY;
  output [1:0] CAMERA_AXI_BRESP;
  output CAMERA_AXI_BVALID;
  input CAMERA_AXI_BREADY;

  (* BOX_TYPE = "user_black_box" *)
  cpu
    cpu_i (
      .RS232_Uart_1_sout ( RS232_Uart_1_sout ),
      .RS232_Uart_1_sin ( RS232_Uart_1_sin ),
      .RESET ( RESET ),
      .MCB_DDR3_rzq ( MCB_DDR3_rzq ),
      .MCB_DDR3_dram_we_n ( MCB_DDR3_dram_we_n ),
      .MCB_DDR3_dram_udqs_n ( MCB_DDR3_dram_udqs_n ),
      .MCB_DDR3_dram_udqs ( MCB_DDR3_dram_udqs ),
      .MCB_DDR3_dram_udm ( MCB_DDR3_dram_udm ),
      .MCB_DDR3_dram_ras_n ( MCB_DDR3_dram_ras_n ),
      .MCB_DDR3_dram_odt ( MCB_DDR3_dram_odt ),
      .MCB_DDR3_dram_ldm ( MCB_DDR3_dram_ldm ),
      .MCB_DDR3_dram_dqs_n ( MCB_DDR3_dram_dqs_n ),
      .MCB_DDR3_dram_dqs ( MCB_DDR3_dram_dqs ),
      .MCB_DDR3_dram_dq ( MCB_DDR3_dram_dq ),
      .MCB_DDR3_dram_ddr3_rst ( MCB_DDR3_dram_ddr3_rst ),
      .MCB_DDR3_dram_clk_n ( MCB_DDR3_dram_clk_n ),
      .MCB_DDR3_dram_clk ( MCB_DDR3_dram_clk ),
      .MCB_DDR3_dram_cke ( MCB_DDR3_dram_cke ),
      .MCB_DDR3_dram_cas_n ( MCB_DDR3_dram_cas_n ),
      .MCB_DDR3_dram_ba ( MCB_DDR3_dram_ba ),
      .MCB_DDR3_dram_addr ( MCB_DDR3_dram_addr ),
      .CLK ( CLK ),
      .VGA_AXI_ARADDR ( VGA_AXI_ARADDR ),
      .VGA_AXI_ARLEN ( VGA_AXI_ARLEN ),
      .VGA_AXI_ARSIZE ( VGA_AXI_ARSIZE ),
      .VGA_AXI_ARBURST ( VGA_AXI_ARBURST ),
      .VGA_AXI_ARCACHE ( VGA_AXI_ARCACHE ),
      .VGA_AXI_ARPROT ( VGA_AXI_ARPROT ),
      .VGA_AXI_ARVALID ( VGA_AXI_ARVALID ),
      .VGA_AXI_ARREADY ( VGA_AXI_ARREADY ),
      .VGA_AXI_RDATA ( VGA_AXI_RDATA ),
      .VGA_AXI_RRESP ( VGA_AXI_RRESP ),
      .VGA_AXI_RLAST ( VGA_AXI_RLAST ),
      .VGA_AXI_RVALID ( VGA_AXI_RVALID ),
      .VGA_AXI_RREADY ( VGA_AXI_RREADY ),
      .REGS_AXI_AWADDR ( REGS_AXI_AWADDR ),
      .REGS_AXI_AWVALID ( REGS_AXI_AWVALID ),
      .REGS_AXI_AWREADY ( REGS_AXI_AWREADY ),
      .REGS_AXI_WDATA ( REGS_AXI_WDATA ),
      .REGS_AXI_WSTRB ( REGS_AXI_WSTRB ),
      .REGS_AXI_WVALID ( REGS_AXI_WVALID ),
      .REGS_AXI_WREADY ( REGS_AXI_WREADY ),
      .REGS_AXI_BRESP ( REGS_AXI_BRESP ),
      .REGS_AXI_BVALID ( REGS_AXI_BVALID ),
      .REGS_AXI_BREADY ( REGS_AXI_BREADY ),
      .REGS_AXI_ARADDR ( REGS_AXI_ARADDR ),
      .REGS_AXI_ARVALID ( REGS_AXI_ARVALID ),
      .REGS_AXI_ARREADY ( REGS_AXI_ARREADY ),
      .REGS_AXI_RDATA ( REGS_AXI_RDATA ),
      .REGS_AXI_RRESP ( REGS_AXI_RRESP ),
      .REGS_AXI_RVALID ( REGS_AXI_RVALID ),
      .REGS_AXI_RREADY ( REGS_AXI_RREADY ),
      .CAMERA_AXI_AWADDR ( CAMERA_AXI_AWADDR ),
      .CAMERA_AXI_AWLEN ( CAMERA_AXI_AWLEN ),
      .CAMERA_AXI_AWSIZE ( CAMERA_AXI_AWSIZE ),
      .CAMERA_AXI_AWBURST ( CAMERA_AXI_AWBURST ),
      .CAMERA_AXI_AWCACHE ( CAMERA_AXI_AWCACHE ),
      .CAMERA_AXI_AWPROT ( CAMERA_AXI_AWPROT ),
      .CAMERA_AXI_AWVALID ( CAMERA_AXI_AWVALID ),
      .CAMERA_AXI_AWREADY ( CAMERA_AXI_AWREADY ),
      .CAMERA_AXI_WDATA ( CAMERA_AXI_WDATA ),
      .CAMERA_AXI_WSTRB ( CAMERA_AXI_WSTRB ),
      .CAMERA_AXI_WLAST ( CAMERA_AXI_WLAST ),
      .CAMERA_AXI_WVALID ( CAMERA_AXI_WVALID ),
      .CAMERA_AXI_WREADY ( CAMERA_AXI_WREADY ),
      .CAMERA_AXI_BRESP ( CAMERA_AXI_BRESP ),
      .CAMERA_AXI_BVALID ( CAMERA_AXI_BVALID ),
      .CAMERA_AXI_BREADY ( CAMERA_AXI_BREADY )
    );

endmodule

